Espressif Systems /ESP32-P4 /I2C0 /SR

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as SR

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (RESP_REC)RESP_REC 0 (SLAVE_RW)SLAVE_RW 0 (ARB_LOST)ARB_LOST 0 (BUS_BUSY)BUS_BUSY 0 (SLAVE_ADDRESSED)SLAVE_ADDRESSED 0RXFIFO_CNT0STRETCH_CAUSE 0TXFIFO_CNT0SCL_MAIN_STATE_LAST 0SCL_STATE_LAST

Description

Describe I2C work status.

Fields

RESP_REC

Represents the received ACK value in master mode or slave mode. 0: ACK,

1: NACK.

SLAVE_RW

Represents the transfer direction in slave mode,. 1: Master reads from slave,

0: Master writes to slave.

ARB_LOST

Represents whether the I2C controller loses control of SCL line. 0: No arbitration lost

1: Arbitration lost

BUS_BUSY

Represents the I2C bus state. 1: The I2C bus is busy transferring data,

0: The I2C bus is in idle state.

SLAVE_ADDRESSED

Represents whether the address sent by the master is equal to the address of the slave. Valid only when the module is configured as an I2C Slave. 0: Not equal

1: Equal

RXFIFO_CNT

Represents the number of data bytes to be sent.

STRETCH_CAUSE

Represents the cause of SCL clocking stretching in slave mode. 0: Stretching SCL low when the master starts to read data.

1: Stretching SCL low when I2C TX FIFO is empty in slave mode.

2: Stretching SCL low when I2C RX FIFO is full in slave mode.

TXFIFO_CNT

Represents the number of data bytes received in RAM.

SCL_MAIN_STATE_LAST

Represents the states of the I2C module state machine. 0: Idle,

1: Address shift,

2: ACK address,

3: Rx data,

4: Tx data,

5: Send ACK,

6: Wait ACK

SCL_STATE_LAST

Represents the states of the state machine used to produce SCL. 0: Idle,

1: Start,

2: Negative edge,

3: Low,

4: Positive edge,

5: High,

6: Stop

Links

() ()